In many semiconductor devices, a metallic coating is applied over the front or back surface of a semiconductor chip to provide better electrical and thermal conductivity. One common metal used as a final metallization layer is copper. Typically, the layer is disposed between a semiconductor chip and a lead frame or between semiconductor chips. However, such metallization layer has certain disadvantages, for example, disconnection at the interface between the copper metallization and tin-containing solder material based on growth of intermetallic phases accompanied by Kirkendall voids.
Tin-containing solder is used due to its good mechanical properties and wetting characteristics with the copper metallization layer. However, it reacts with the copper wetting layer and builds copper-tin intermetallic phases. Particularly tin builds with copper intermetallic phases Cu3Sn at temperature higher than 200 degrees accompanied with development of Krikendall voids causes reliability issue. After high temperature storage or temperature cycling voids strongly develop at the interface of the tin-containing solder joints and copper metallization layer. These voids (Krikendall voids) are formed due to different diffusion coefficients of copper and tin on the copper side of the interface. As a result of such voids, the metallization layer begins to separate and leads to electrical failure of the semiconductor device. Therefore, a need exists for a method and system that avoid or slow the dynamic of growth of intermetallic phases accompanied by Krikendall voids to improve the reliability of semiconductor devices for high temperature application.